eInfochips

  The smart home industry has witnessed exponential growth over the past decade, with devices like smart lights, thermostats, and security cameras becoming household staples. However, one of the biggest challenges in this space has been the lack of interoperability between devices from different manufacturers. Enter the Matter Protocol , a groundbreaking standard that promises to unify smart home ecosystems and revolutionize the way devices communicate. Matter Protocol Matter, formerly known as Project CHIP (Connected Home over IP), is an open-source, royalty-free connectivity standard developed by the Connectivity Standards Alliance (CSA). It aims to create a universal language for smart devices, ensuring seamless communication and compatibility across brands. With Matter, the dream of a truly interconnected smart home is becoming a reality, and its implications extend far beyond just convenience. What is the Matter Protocol and Why Does It Matter? The Matter Protocol is designed...

Look around, how many gadgets or appliances do you see? Five? Ten? Fifty? Maybe even more. Devices and gadgets have become ubiquitous and we have started to rely on them heavily, may it be for work or for assistance in our chores. However, do you know what those devices rely on to accompany us with our tasks? Hardware and firmware. What is important for these devices to function properly is trouble-free hardware components and firmware that ensures the device performs its designated tasks. While hardware design and development is the first phase in creating our devices, the firmware is what ensures the proper functioning of the hardware components. More often than not, our devices are running multiple programs at a time, which will eventually degrade the system performance and will slow the pace of operations. The obvious solution that people consider in such cases is to replace the old, worn-out hardware with new parts. The other and the better way out is to update the firmware that t...

Typically, we see a 4X increase in memory size every 3 years to cater to the needs of new-generation IoT devices. Deep submicron devices contain a large number of memories which demands lower area and fast access time, hence, an automated testing strategy for such semiconductor engineering designs is required to reduce ATE (Automatic Test Equipment) time and cost. Memory faults behave differently than classical Stuck-At faults. Therefore, the fault models are different in memories (due to their array structure) than in the standard logic design. Also, during memory tests, apart from fault detection and localization, self-repair of faulty cells through redundant cells is also implemented. It is also a challenge to test memories from the system design level as it requires test logic to multiplex and route memory pins to external pins. To test the memories functionally or via ATPG (Automatic Test Pattern Generation)requires very large external pattern sets for acceptable test coverage due...